APPLICATION LEVEL POWER MANAGEMENT - Printable Version +- Free Academic Seminars And Projects Reports (https://easyreport.in) +-- Forum: Seminars Topics And Discussions (https://easyreport.in/forumdisplay.php?fid=30) +--- Forum: Engineering Seminars Topics (https://easyreport.in/forumdisplay.php?fid=7) +---- Forum: Applied Electronics Seminar Topics (https://easyreport.in/forumdisplay.php?fid=48) +---- Thread: APPLICATION LEVEL POWER MANAGEMENT (/showthread.php?tid=11971) |
APPLICATION LEVEL POWER MANAGEMENT - kuttumon - 08-16-2017 APPLICATION LEVEL POWER MANAGEMENT Presented by:- Neenu V S Applied Electronics Colege Of Engineering, Trivandrum 2007-11 batch APPLICATION LEVEL POWER MANAGEMENT An approach for reducing power or switching the system to low power state when inactive. It is applicable in cell phone, mp3 player, portable media player, laptops. WHY POWER MANAGEMENT IMPORTANT IN MOBILE PROCESSORS?? Reduce overall energy consumption Prolong battery life for portable and embedded systems Reduce cooling requirements Reduce noise. Reduce operating costs for energy and cooling. APPLICATION LEVEL POWER MANAGEMENT UNIT A microcontroller that governs power functions of digital platforms. This microchip has many similar components to the average computer, including firmware and software, memory, a CPU, input/output functions, timers , as well as analog to digital converters . Remain active even when the computer is completely shut down, powered by the backup battery. FUNCTIONS OF PMU Monitoring power connections and battery charges Charging batteries when necessary Controlling power to other integrated circuits Shutting down unnecessary system components when they are left idle Controlling sleep and power functions (on and off) Managing the interface for built in keypad and trackpads on portable computers Regulating the real-time clock (RTC) LIMITATIONS Failure to turn on Failure to restore from sleep mode Failure to recognize connected devices (FireWire, USB, etc.) POWER MANAGEMENT KEYS Power key Used both to power on and to power off the computer. Sleep key Used to put the computer to sleep, when it uses significantly lower power than when it is active, but can be woken quickly. Wake key Wakes the system from standby. APPLICATION LEVEL POWER MANAGEMENT TECHNIQUES Static techniques =>include different low-power modes, on-demand gating of clocks and power domains etc. Dynamic techniques => is to dynamically scale the CPU work frequency and voltage. DYNAMIC POWER MANAGEMENT FOR PROCESSORS Dynamic voltage and frequency scaling (DVFS) => clock rates and voltages are lowered in software depending on the performance required by the application. Eg: Advanced RISC machine (ARM) Digital signal processor (DSP) Adaptive voltage scaling (AVS) =>based on variations that come up during chip manufacturing as well as during a device's operational lifetime Contd . Dynamic power switching (DPS) =>determines when a device has completed its current computational tasks and, if it's not needed at the moment, then puts the device into a low power state DVFS TECHNOLOGY A CASE STUDY:- Chameleon: Application- Level Power Management CHAMELEON The chamaleon project successfully demonstrates the benefits of:- 1. Application level networking, 2. Application-level memory management, 3. Application-level file systems, and CPU scheduling 4. Application level power management. CONTRIBUTIONS Performance. Our approach enables each application to make local power management decisions based on its processor demand and processor availability. Flexibility. Such an approach enables each application to implement a power management policy that closely matches its energy and performance requirements. Contd Generality. Our approach is general and do not make specific assumptions about nature of applications. Modest implementation costs. The user-level power management policies can be implemented at modest cost. CHAMELEON ARCHITECTURE KEY COMPONENTS Chamaleon consists of 3 key components.. 1. An OS interface :- that enables applications to query the kernel for resource usage statistics and to convey their desired power settings to the kernel. 2. A modified CPU scheduler:-that support per- process CPU power settings and application isolation 3. A speed adapter:- that maps application- specified power settings to the nearest CPU speed actually supported by the hardware KEY STEPS OF A USER LEVEL POWER MANAGEMENT Estimate processor demand:- a combination of application-domain knowledge and past CPU usage statistics is used to estimate processor demand in the near future. Estimate processor availability:- the amount of CPU time that will be available to the application in the presence of other applications is estimated. Determine processor speed setting:- chooses an speed setting that attempts to match the processor demand to the processor availability APPLICATIONS Moving Picture Experts Group Video Decoder Tool(soft real-time application) Videoconferencing Tool(soft real-time application) Word Processor(interactive best effort application) Web Browser( event-driven interactive application) CONCLUSION Application level power management is a new approach for power management in mobile processors. Chameleon can extract up to 50 percent of savings when compared to the recently proposed OS-based DVFS techniques Chameleon imposes negligible overheads and is very effective at scheduling concurrent applications with diverse energy needs. Our results demonstrate the feasibility and benefits of power management at the application level References AMD PowerNow! Technology with optimized power management". AMD. Desktop and Portable Systems: Second Edition" Edited by Owen W. Linzmayer K. Flautner, S. Reinhardt, and T. Mudge, Automatic Performance Setting for Dynamic Voltage Scaling, Proc. ACM MobiCom 01,pp. 260-271, July 2001. [attachment=6966] APPLICATION LEVEL POWER MANAGEMENT - patil sandip - 08-16-2017 This article describes about Chameleon, which is an application-level power management approach for reducing energy consumption in mobile processors.The improvements in battery capabilities progressed at a much slower rate than that at which the processing, storage, and communication capabilities of these devices have improved as predicted by Moore s law. New applications like the movie players and batch compilation are very much power hungry and hence power must be managed efficiently. Modern devices use a number of power management features such as dynamic voltage and frequency scaling (DVFS) capabilities in intel's some processors. This system varies the CPU speed dynamically based on the workload and reduces energy consumption. But sometimes, it can result in slowdown from degrading of the performance. In all cases, the nonlinear relationship between CPU working rate and power consumption is taken advantage of. By using application-domain knowledge, as opposed to OS-level or hardware-level inferred knowledge, Chameleon can substantially reduce CPU energy consumption.The three three key components of Chameleon are: a)OS interface: resource usage statistics can be queried by the applications through this and their desired power settings can be conveyed back to the kernel b)a modified CPU scheduler: This enables the per-process CPU power settings and application isolation. the current power settings for each process is maintained by the applications and these settings are sent to the processor whenever the process is scheduled for execution. c)a speed adapter: This part maps application-specified power settings to the nearest CPU speed. The desired CPU speed is specified by the application as a fraction of the maximum processor speed. The function of the speed adapter is then to map this fraction to the nearest supported CPU speed. get the report pdf here: http://mediafire?zi07f62kodjofce |