10-04-2017, 08:49 PM
ECE Fourth Year Design Project Database
Secure Authenticated Transceiver 2006.002
Secure delivery of digital content requires end-to-end security in which encryption and decryption occur at the point of analog data I/O. We present a novel communications protocol and a prototype device, the Secure Authenticated Transceiver (SAT), to satisfy this need. The prototype is implemented on an embedded processor on a development board. The envisioned system, in which SATs can open secure, authenticated sessions with one another or with a central server, allows for secure content delivery. For example, in a hospital environment, doctors could retrieve and voice-annotate patient records, which have strict data security requirements, using SATs embedded in a microphone, earpiece, and PDA. The protocol is designed to be flexible; many more applications are possible. Sessions are authenticated using Elliptic Curve Cryptography (ECC) and data streams are encrypted with Advanced Encryption Standard (AES) algorithms.
Hardware Accelerated Feistel Cipher Implementation 2006.003
With the evolution of 3G mobile systems, the demand on quality of service and security protection are forcing designers to address the issues of data integrity, confidentiality, and entity authentication. This project entails the design of hardware and software implementations of a Feistel class block cipher commonly used for data encryption and integrity checks for 3G mobile communication systems. The main objective of the project is to explore the various implementation methodologies and serve as a benchmark for future hardware encryption development.
Software to Parallel Hardware Compiler 2006.014
Many of today's parallelizable computing problems are being performed using serial methods in software. Numerous low- and high-level engineering problems could realize significant performance gains if they were divided into sub-problems and solved in parallel. This project presents the design of a system that would allow a user to specify a problem in a simple language and generate a parallelized solution. The parallelized solution will be executed on one or more field-programmable gate arrays (FPGA). Concurrent realization of basic operations along with the sub-division of a problem reduces solution complexity. This solution will allow the production of a cost-effective and rapid computing tool.
Graphical LCD Controller 2006.018
Liquid Crystal Displays (LCDs) are becoming more prevalent in embedded systems where a user interface is required. It can be difficult and costly to interface an LCD into these embedded systems. This project presents the design of a VHDL-based LCD controller. The LCD controller accepts commands sent from an embedded microcontroller and produces the necessary control signals. The LCD is controlled with a 4-bit parallel interface and four control lines. The VHDL-based design is modular and portable, and can easily be interfaced with existing hardware applications. It provides a convenient, highly available, and inexpensive alternative to dedicated LCD controllers.