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SEMINAR ON PLC OPERATION
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SEMINAR ON PLC OPERATION
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INTRODUCTION

For simple programming the relay model of the PLC is sufficient. As more complex
functions are used the more complex VonNeuman model of the PLC must be used. A
VonNeuman computer processes one instruction at a time. Most computers operate this
way, although they appear to be doing many things at once. Consider the computer components
shown in Figure 8.1.

OPERATION SEQUENCE

All PLCs have four basic stages of operations that are repeated many times per
second. Initially when turned on the first time it will check it s own hardware and software
for faults. If there are no problems it will copy all the input and copy their values into
memory, this is called the input scan. Using only the memory copy of the inputs the ladder
logic program will be solved once, this is called the logic scan. While solving the ladder
logic the output values are only changed in temporary memory. When the ladder scan is
done the outputs will updated using the temporary values in memory, this is called the output
scan. The PLC now restarts the process by starting a self check for faults. This process
typically repeats 10 to 100 times per second as is shown in Figure 8.3.

The Input and Output Scans

When the inputs to the PLC are scanned the physical input values are copied into
memory. When the outputs to a PLC are scanned they are copied from memory to the
physical outputs. When the ladder logic is scanned it uses the values in memory, not the
actual input or output values. The primary reason for doing this is so that if a program uses
an input value in multiple places, a change in the input value will not invalidate the logic.
Also, if output bits were changed as each bit was changed, instead of all at once at the end
of the scan the PLC would operate much slower.

The Logic Scan

Ladder logic programs are modelled after relay logic. In relay logic each element
in the ladder will switch as quickly as possible. But in a program elements can only be
examines one at a time in a fixed sequence. Consider the ladder logic in Figure 8.4, the
ladder logic will be interpreted left-to-right, top-to-bottom. In the figure the ladder logic
scan begins at the top rung. At the end of the rung it interprets the top output first, then the
output branched below it. On the second rung it solves branches, before moving along the
ladder logic rung.
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