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PIPELINED MULTUTHREADING TRANSFORMSATIONS AND SUPPORT MECHANISMS
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PIPELINED MULTUTHREADING TRANSFORMSATIONS AND SUPPORT MECHANISMS
In the future microprocessors, the chip multiprocessors will be the predominant type. But the improved application performance cannot be directly offered by the multiple on-chip cores. The applications are to be parallelized to execute simultaneously on the multiple cores and this is essential to their success. The DO ALL technique and similar independent multithreading techniques create the partially or fully independent threads in which the intercommunication among the threads is very little. These cannot be used for parallelizing the general purpose applications. The DO ACROSS (which is a cyclic multithreading technique) seems to be more competent, but infact the cyclic-interthread dependencies cause them to be intolerant towards the rising inter-core latencies.
In order to avoid the above mentioned problems and demerits, a new pipelined multithreading transformation known as the Decoupled Software Pipelining (DSWP) is introduced in this article. They can easily handle inter-core latencies and still handle the codes with very complex recurrences.

Get the full report here:
http://scribddoc/19154350/Pipelined-mult...mechanisms
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