Clock Less Chip

[jaisoninspire]

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Clock less approach, which uses technique known as asynchronous logic, differs from conventional computer circuit design in that the switching on and off of digital circuits are controlled individually by specific pieces of data rather than by a tyrannical clock that forces all of the millions of the circuits on a chip to march in unison. It overcomes all the disadvantages of a clocked circuit such as slow speed, high power consumption, high electromagnetic noise etc. For these reasons the clock-less technology is considered as the technology, which is, going to drive majority of electronic chips in the coming years

[Asha.S]

please read http://seminarsprojects.net/Thread-Clock...597#pid597 for Clock Less Chip report