08-16-2017, 09:44 PM
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OVERVIEW OF DSP ARCHITECTURE
A digital signal processor (DSP) is a type of microprocessor - one that is incredibly fast and Powerful. It is a key component in much communication, medical, military and industrial products. A class of microprocessors optimized for DSP it has advantage in speed, cost and energy efficiency. DSP architectures are molded by DSP.
Algorithms
Fast Multipliers
Multiple Execution Units
Efficient Memory Access
Data Format
Efficient Zero-Overhead Looping
Streamlined I/O
Specialized Instruction Sets
1.1 Fast Multipliers: One of most used known algorithm: FIR filter.
y= Xh
Where X: vector of input data; h: filter coefficients
Main operations: multiply & add Multiplication is one of the most common operations in signal processing (convolution, IIR filtering, Fourier Transforms..) Need fast multiply-accumulate operations Shift, multiply and add in a loop. Each require one or more cycle. It Need to developed special hardware for multiplication In 1982, Texas Instruments (TMS32010) (in a single clock cycle) All modern DSP processors include at least One or more .dedicated, single-cycle multiplier Or combined multiply-accumulate unit (MAC).
1.2 Multiple Execution Units: Need to perform high computational tasks in real time.
E.g. = Filtering signals in 10-100 KHz sampling rate in real time several independent execution units are required. It should operate in parallel e.g. Arithmetic Logic Unit (ALU) and a shifter in parallel to MAC units
1.3 Efficient Memory Access: Executing a MAC in a single cycle means:
(1) Fetching the MAC instruction in a single cycle.
(2) Fetching a data sample in a single cycle.
(3) Fetching a filter coefficient in a single cycle.
So, good performance requires high memory bandwidth commonly used approach. It Use two or more separate memory bank. Each has its own bus and each could be read or written during every cycle.
1.4 Data Format: DSP algorithms generally use floating point formats. Fixed point processors are Cheaper and less power consuming. Floating point formats require more complex hardware. It uses shortest data word width that will provide adequate accuracy. Consider the cost & energy consumption. Most fixed point DSP processors use 16 bit data words. They are sufficient for many applications some use 20, 24 or 32 bit data word for better accuracy. Most DSP processors include one or more accumulator registers. Accumulator Registers are wider than other registers. It Provide extra guard bits to avoid overflow.
1.5 Efficient Zero Overhead Looping: DSP algorithms have many loops. It Use efficient looping. Special loop is Zero Overhead Looping. It has no loop counter and no branching back to the top of the loop
1.6 Streamlined I/O: It has specialized serial or parallel I/O interfaces and Streamlined I/O handling mechanisms E.g.: Low overhead interrupts and direct memory access, DMA.
1.7 Specialized Instruction Sets: It has two goals in instruction sets:
1. Make maximum use of hardware, increase efficiency in which Programmer can specify parallel operations in single instructions.
2. Minimize memory space required to store DSP programs.(Memory is a cost!) it keep instructions
Short. Use mode bits rather than encoding, Restrict operations to specific registers, Restrict operation combinations in the intructions. This makes DSP instructions complicated.