08-16-2017, 08:53 PM
Abstract
In view of changing the type of energy conversion inCMOS circuits, this paper investigates low power CMOScircuit design which adopts gradually changing powerclock. First, we discuss the algebraic expressions and thecorresponding properties of clocked power signals, then aclocked CMOS gate structure is presented. The PSPICEsimulations demonstrate the low power characteristic ofclocked CMOS circuits using trapezoidal power-clock.Finally, this paper also explores the design of sequentialcircuit, which adopts flip-flop with clocked power.
I. Introduction
The power dissipation in CMOS circuits is related tothe type of energy conversion. In static CMOS circuits, aDC power supply is used and switching signal values isrealized by charging and discharging the nodecapacitance. During this process, the charge is drawn fromthe power supply dd V , then transported to nodecapacitance, and returned to the ground terminal, resultingin an irreversible energy conversion from electric energyto heat. As a result, when a node capacitance is charged(or discharged), it leads to an energy dissipation of221dd CV occurs.[1] So reducing the energy dissipation hasbeen equated to reducing the switching activity. Lowpower design targeting minimum switching activity hasmade significant progress in recent years.[2] However, theobtained energy saving is still limited.An energy conversion is needed to represent achange in signal value. If energy exists only in one form,i.e., electric energy, then there is only one irreversibleenergy conversion from electric energy to heat. To breakthis one-way conversion, researchers have introducedanother energy form, i.e., magnetic field energy, into thedigital circuit. If we relate the signal change to theconversion of electric energy to magnetic energy the socalled energy-recovery can be realized, by which theirreversible conversion from electric energy to heat causedby dissipative elements, i.e., resistors is largely reduced oravoided.The energy conversion from electric field tomagnetic field and vice versa implies that circuits shouldbe supplied with AC power. In this case, signals in thecircuits should also be alternating quantities. The latterhas been extensively used in dynamic CMOS logic,clocked CMOS logic, and various domino logics.[1]However, those circuits still rely on DC power, and theenergy conversion remains as electric energy to heat.Therefore, we should further study the case of circuitssupplied with AC power. The AC power controls theworking rhythm of the circuit and acts as the clock, so wewill call it the power-clock. The research shows that if theadopted power clock with gradually changing processduring its rising and falling, only less energy is dissipatedfor charging and discharging the node capacitance throughthe conducting MOS transistor. Therefore, the called adiabatic switching operation is resulted, by which anew approach to design low power CMOS circuits isproposed.Clocked CMOS circuits with gradually rising andfalling power-clock are expected to obtain a significantenergy saving. It attracts many researchers to study thisissue in recent years[3-11]. However, the operationalconstraint that the output signal should track the powerclock sgradually rising and falling behavior toaccomplish the charging and discharging processincreases difficulty in the circuit design. At present, theexisting research either adopts retractile cascade powerclock or adopts multiple-phase power clock with memoryschemes. Obviously, their applicability is awfully limited.We think that a new research on the energy recoveryCMOS circuit should start from its basic theory, includingthe basic algebraic expressions and the basic properties ofclocked signals. At the same time, both the basic clockedCMOS gate and the clocked flip-flop, the basic unit ofenergy-recovery CMOS circuits, should be investigated atthe beginning. With the above view this paper will focuson these two topics.
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