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monolithic 65-nm 144-Mbit SRAM
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Fastest Clock Speed up to 550 MHz and Total Data Rate up to 80
Gbps; Dramatically Expanding the Performance of Networking and Signal Processing
Applications Compared with 90-nm SRAMs, Cypress s 65-nm QDR and DDR SRAMs offer up to 50% lower standby and dynamic current consumption, enabling the new wave of "green" networking infrastructure applications. The QDRII+ and DDRII+ devices have
On-Die Termination (ODT), which improves signal integrity, reduces system cost,
and saves board space by eliminating external termination resistors. The 65-nm
devices use a Phase Locked Loop (PLL) instead of a Delay Locked Loop (DLL),
which enables a 35 percent wider data valid window to simplify board-level
timing closure and enhance compatibility with third-party processors
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