Design of a Low-Power High-Speed Current Comparator
in 0.35- m CMOS Technology

Soheil Ziabakhsh1, Hosein Alavi-Rad1,
1Electrical Engineering, University of Guilan,
2Electrical Engineering Department,
3Engineering & Science Department, Sharif University of Technology, International Campus, Kish, Iran


Abstract

A novel low power with high performance low current comparator is proposed in this paper which comprises of low input impedance using a simple biasing method. It aimed for ....etc

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Abstract:

This project provides the experience of applying an advanced version of Spurious Power Suppression Technique (SPST) on multipliers for high speed and low power purposes. When a portion of data does not affect the final computing results, the data controlling circuits of SPST latch this portion to avoid useless data transition occurring inside the arithmetic units, so that the useless spurious signals of arithmetic units are filter out. Modified Booth Algorithm is used in this project for mul ....etc

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Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System

Reference Paper:
Chiou-Kou Tung, A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System,

Supervisor: Presented By:
Asst. Prof. K.V. Rao Venkatarao Selamneni
MNNIT, Allahabad Reg No.:2009VL18


Introduction

In this paper, a low-power high-speed CMOS
full adder core is proposed.
The five full adders will be compared with the
new proposed full adder.
There are two major methodologies to improve
adder s performanc ....etc

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to get information about the topic low power high speed current comparator full report ppt and related topic refer the page link bellow

http://seminarsprojects.net/Thread-design-of-a-low-power-high-speed-current-comparator-in-0-35-%CE%BCm-cmos-technology

http://seminarsprojects.net/Thread-low-power-high-speed-switched-current-comparator ....etc

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LOW POWER HIGH SPEED SWITCHED CURRENT COMPARATOR

Y. SUN, Y.SWANG, F.C. LAI
HARBIN INSTITUTE OF TECHNOLOGY, CHINA


ABSTRACT:

Current mode implementation provides an alternative to high speed data conversion systems for low voltage applications. The pursuing of speed and accuracy of data conversion makes comparator critical. This paper presents a novel switched current (SI) comparator which achieves high speed without sacrificing either accuracy or power dissipation. Employing a class AB current mirror as the inp ....etc

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A Low-Voltage Low-Power Comparator With
Current-Controlled Dynamically-Biased
Preamplifiers For DCM Buck Regulators

Hoi Lee
Department of Electrical Engineering,
The University of Texas at Dallas,
Richardson, TX 75080-3021, USA.



Abstract-

Comparator-controlled power switch has been widely used to improve power efficiencies of discontinuous-conductionmode (DCM) buck regulators. Some major design challenges are capabilities of the comparator to operate at low voltage and dissipate low power for low-voltage DCM ....etc

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Low power and high speed multiplication design through mixed number representation


Apeksha Reddy, VI Sem, SDMCET, Dharwad
Ashroo M Das, VI Sem, SDMCET, Dharwad



Contents

INTRODUCTION
THE ALGORITHM AND ITS VLSI ARCHITECTURE
CONVERSION FROM TWO S COMPLEMENT TO SM NOTATION
RADIX-4 BOOTH S ALGORITHM
SPEEDING UP THE PP ACCUMULATION
CONVERTING THE RB NUMBER INTO TWO S COMPLEMENT NUMBER
CONCLUSION
REFRENCES
ACKNOWLEDGEMENT

What is a multiplication ?
How is multiplication done?
With what speed is ....etc

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Design Considerations for High-Speed Low-Power Low-Voltage CMOS Analog-to-Digital Converters


Introduction
The realization of signal sampling and quantization at high sample rates
with low power dissipation is an important goal in many applications, including
portable video devices such as camcorders, personal communication
devices such as wireless LAN transceivers, in the read channels of magnetic
storage devices using digital data detection, and many others. This paper
descr ....etc

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Abstract New emerging applications in the areas of portable power generation, small turbo compressors and spindles require the development of ultrahigh-speed, low power electrical drives. A 500000 r/min, 100W electrical drive system is presented. Because of the ultrahigh-speed requirements, standard machine design and power electronic topology choices no longer apply and the complete drive system has to be considered. A permanent magnet machine with a slotless litz-wire winding is used, which results in a low motor inductance and a high fund ....etc

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verilog code for design of low power high speed truncation error tolerant adder i ....etc

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