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Title: Target Maneuver Adaptive Guidance Law for a Bounded Acceleration Missile
Page Link: Target Maneuver Adaptive Guidance Law for a Bounded Acceleration Missile -
Posted By: itsarichmansworld
Created at: Thursday 05th of October 2017 05:00:03 AM
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Target Maneuver Adaptive Guidance Law for a Bounded Acceleration Missile

Presented By
Mr. Partha Saradhi Vankara
st
1 Semester, M.Tech, Roll No:10GNC08

Department of Electrical Engineering
College of Engineering, Trivandrum
Thiruvananthapuram-16
2010

Abstract
In this topic, an interceptor (missile) with bounded acceleration, pursues a target which
makes a sudden step maneuver. A multiple-model adaptive estimator-guidance law is pre-
sented for state ....etc

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Title: matrix multiplication by vhdl
Page Link: matrix multiplication by vhdl -
Posted By: venkataramana
Created at: Thursday 17th of August 2017 05:37:18 AM
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Matrix multiplication design using VHDL and Xilinx Core Generator

The VHDL code for Matrix multiplication is presented. This project aims to develop and implement a synthesizable matrix multiplier core, which is capable of performing matrix calculations for 32x32 size matrices.
Each component of the matrices is a 16-bit unsigned integer. The kernel is implemented in Xilinx FPGA Spartan-6 XC6SLX45-CSG324-3. Both behavior and post-route verification are completed. The simulated result is matched accurately to the result of the Matlab implemen ....etc

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Title: nikhilam sutra for multiplication vhdl code
Page Link: nikhilam sutra for multiplication vhdl code -
Posted By: georgekuttythms
Created at: Thursday 05th of October 2017 04:51:03 AM
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http://seminarsprojects.net/Thread-16-bit-booth-multiplier-vhdl-code

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Title: multiplication acceleration through twin precision ppt s only
Page Link: multiplication acceleration through twin precision ppt s only -
Posted By: [email protected]
Created at: Thursday 17th of August 2017 04:59:42 AM
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Title: Automatic collision detection and acceleration control using GSM and RF technology
Page Link: Automatic collision detection and acceleration control using GSM and RF technology -
Posted By: farhath
Created at: Thursday 05th of October 2017 03:53:22 AM
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Title: Acceleration hardware
Page Link: Acceleration hardware -
Posted By: VENKYSANDEEP
Created at: Thursday 05th of October 2017 05:19:13 AM
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Acceleration hardware

Acceleration hardware refers to devices that speed up data communications, storage and retrieval, encryption and decryption, mathematical operations, graphics, and Web page viewing. Acceleration hardware can consist of an individual integrated circuit (also called an IC or chip), a printed circuit card, or a self-contained system.

A NAS accelerator is a printed circuit card that offloads TCP/IP processing from a microprocessor. This can reduce latency, increase throughput, and reduce overhead co ....etc

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Title: vhdl coding for 2 x 2 matrix multiplication
Page Link: vhdl coding for 2 x 2 matrix multiplication -
Posted By: jacksonchengalai
Created at: Thursday 17th of August 2017 04:43:37 AM
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please help me. ....etc

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Title: GPU Acceleration of Runge-Kutta Integrators
Page Link: GPU Acceleration of Runge-Kutta Integrators -
Posted By: prafful_1988
Created at: Thursday 05th of October 2017 04:19:17 AM
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Abstract We consider the use of commodity graphics processing units (GPUs) for the common task of numerically integrating ordinary differential equations (ODEs), achieving speedups of up to 115-fold over comparable serial CPU implementations, and 15-fold over multithreaded CPU code with SIMD intrinsics. Using Lorenz '96 models as a case study, single and double precision benchmarks are established for both the widely used DOPRI5 method and computationally tailored low-storage . A range of configurations are assessed on each, including multith ....etc

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Title: Low power and high speed multiplication design through mixed number representation
Page Link: Low power and high speed multiplication design through mixed number representation -
Posted By: suhail123
Created at: Thursday 17th of August 2017 04:52:50 AM
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Low power and high speed multiplication design through mixed number representation


Apeksha Reddy, VI Sem, SDMCET, Dharwad
Ashroo M Das, VI Sem, SDMCET, Dharwad



Contents

INTRODUCTION
THE ALGORITHM AND ITS VLSI ARCHITECTURE
CONVERSION FROM TWO S COMPLEMENT TO SM NOTATION
RADIX-4 BOOTH S ALGORITHM
SPEEDING UP THE PP ACCUMULATION
CONVERTING THE RB NUMBER INTO TWO S COMPLEMENT NUMBER
CONCLUSION
REFRENCES
ACKNOWLEDGEMENT

What is a multiplication ?
How is multiplication done?
With what speed is ....etc

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Title: DIGITAL TWIN SPARK IGNITION DTSI A New Revolution of Twin Spark in IC Engine
Page Link: DIGITAL TWIN SPARK IGNITION DTSI A New Revolution of Twin Spark in IC Engine -
Posted By: amit
Created at: Thursday 17th of August 2017 06:49:02 AM
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Twin Spark Ignition
Normal ignition system has a single spark plug. The flame front created by the spark takes some time to reach the entire combustion chamber. Hence the burning of air-fuel mixture is slow and incomplete.

In case of twin spark, two spark-plugs fire at the same time. This simultaneous firing and swirl of the air-fuel mixture results in complete combustion. This action is digitally controlled by the DTS-i system (namely the twin spark plugs, TRICS II and intelligent CDI)

:: Benefit: ::
Complete combustion of air-fuel m ....etc

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