A Phase Change Memory as a Secure Main Memory
A Seminar Report
by
Abdul Nassar A A
M105101
Department of Computer Science & Engineering
College of Engineering Trivandrum
Kerala - 695016
2010-11



Contents
1 Introduction 5
2 PCM Technology 6
2.1 History and background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Memory cell . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3 Operation . . . . . . . . . . . ....etc

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Virtual-Memory Management


Objectives
1 To describe the benefits of a virtual memory system
2 To explain the concepts of demand paging, pagereplacement
algorithms, and allocation of page frames
3 To discuss the principle of the working-set model

Background

1Virtual memory separation of logical memory from
physical memory.

2 Only part of the program needs to be in memory for
execution
3 Logical address space can therefore be much larger
than physical addre ....etc

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Virtual memory
Virtual memory is an illusion of a memory that is larger than the real memory
Only some parts of a process are loaded in memory, other parts are stored in a disk area called swap space and loaded only when needed
It is implemented using noncontiguous memory allocation
* The memory management unit (MMU) performs address translation.
The virtual memory handler (VM handler) is that part of the kernel which manages virtual memory
Overview of virtual memory
Memory allocation information is stored ....etc

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This seminar presents a feasibility study for performing virtual address translation without specialized translation hardware. Removing address translation hardware and instead managing translation in software has the potential to make the processor design simpler, smaller, and more energy-efficient at little or no cost in performance.

The purpose of this seminar is to describe the design and quantify its performance impact. Trace-driven simulations show that software managed address translation is just as efficient as hardware managed tran ....etc

[:=Read Full Message Here=:]

This seminar presents a feasibility study for performing virtual address translation without specialized translation hardware. Removing address translation hardware and instead managing translation in software has the potential to make the processor design simpler, smaller, and more energy-efficient at little or no cost in performance. The purpose of this seminar is to describe the design and quantify its performance impact. Trace-driven simulations show that software managed address translation is just as efficient as hardware managed translat ....etc

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