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Title: Low complexity Iris coding and recognition based on directionlets
Page Link: Low complexity Iris coding and recognition based on directionlets -
Posted By: sahooamarjeet
Created at: Thursday 17th of August 2017 06:26:46 AM
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Title: matrix multiplication by vhdl
Page Link: matrix multiplication by vhdl -
Posted By: venkataramana
Created at: Thursday 17th of August 2017 05:37:18 AM
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Matrix multiplication design using VHDL and Xilinx Core Generator

The VHDL code for Matrix multiplication is presented. This project aims to develop and implement a synthesizable matrix multiplier core, which is capable of performing matrix calculations for 32x32 size matrices.
Each component of the matrices is a 16-bit unsigned integer. The kernel is implemented in Xilinx FPGA Spartan-6 XC6SLX45-CSG324-3. Both behavior and post-route verification are completed. The simulated result is matched accurately to the result of the Matlab implemen ....etc

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Title: time complexity for c program for strassen s matrix multiplication ppt
Page Link: time complexity for c program for strassen s matrix multiplication ppt -
Posted By: Saga
Created at: Friday 06th of October 2017 02:47:48 PM
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Title: vhdl coding for 2 x 2 matrix multiplication
Page Link: vhdl coding for 2 x 2 matrix multiplication -
Posted By: jacksonchengalai
Created at: Thursday 17th of August 2017 04:43:37 AM
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hi.
I want to write a code for minuseultiplication and add and minuse two 2*2 matrix by VHDL.
please help me. ....etc

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Title: Survey of Matrix multiplication algorithm
Page Link: Survey of Matrix multiplication algorithm -
Posted By: ark
Created at: Thursday 05th of October 2017 04:34:21 AM
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Presented by:B.V.PhaniSekhar
Survey of Matrix Multiplication Algorithms

Abstract
Matrix multiplication is one of the most fundamental operations in linear algebra and serves as the main building block in many different algorithms, including the solution of systems of linear equations, matrix inversion, evaluation of the matrix determinant, in signal processing, and the transitive closure of a graph. In several cases the asymptotic complexiti ....etc

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Title: LOW COMPLEXITY IRIS CODING AND VERIFICATION
Page Link: LOW COMPLEXITY IRIS CODING AND VERIFICATION -
Posted By: chinna_rao
Created at: Thursday 17th of August 2017 05:24:32 AM
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LOW COMPLEXITY IRIS CODING AND VERIFICATION

OBJECTIVE
The objective of our project is to provide authentication based on iris recognition. A novel iris recognition method is presented. In the method, the iris features are extracted using the oriented separable wavelet transforms (directionlets) and they are compared in terms of a weighted Hamming distance. The feature extraction and comparison are shift-, size- and rotation-invariant to the location of iris in the ac ....etc

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Title: matrix multiplication in verilog code
Page Link: matrix multiplication in verilog code -
Posted By: kumar gaurav
Created at: Thursday 05th of October 2017 05:10:09 AM
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matrix multiplication in verilog code

Abstract

Digital multipliers are indispensable in the hardware implementation of many important functions such as DCT, IDCT, FFT etc in signal processing. This paper deals with Design and implementation of Vedic Multipler in Image Compression using DCT algorithm. The DCT (Discrete Cosine Transform) performs spatial compression of the data while IDCT performs decompression of the data. Here, matrix multiplication is one of the important step in both the transforms. Hence, to perform these computations, we ....etc

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Title: systolic array matrix multiplication in verilog
Page Link: systolic array matrix multiplication in verilog -
Posted By: archana57
Created at: Thursday 05th of October 2017 04:49:31 AM
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Abstract:

Matrix multiplication is the kernel operation used in many image and signal processing applications. This paper demonstrates an effective design for the Matrix Multiplication using Systolic Architecture. This architecture increases the computing speed by using the concept of parallel processing and pipelining into a single concept. The selected platform is a FPGA (Field Programmable Gate Array) device since, in systolic computing, FPGAs can be used as dedicated computers in order to perform certain computations at very high frequenci ....etc

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Title: matrix multiplication using grid and java
Page Link: matrix multiplication using grid and java -
Posted By: saju
Created at: Thursday 17th of August 2017 06:34:53 AM
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hi you can refer these pages to get the details on matrix multiplication

http://seminarsprojects.net/Thread-implementation-of-strassen-s-algorithm-for-matrix-multiplication

http://seminarsprojects.net/Thread-survey-of-matrix-multiplication-algorithm ....etc

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Title: verilog code for matrix multiplication
Page Link: verilog code for matrix multiplication -
Posted By: rjuntr
Created at: Thursday 17th of August 2017 05:16:14 AM
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i need verilog matrix multiplication code of n*n matrix.please send me at [email protected] ....etc

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